發(fā)布時間：2018-02-02 00:09

  本文關(guān)鍵詞： 千兆以太網(wǎng) 邏輯設(shè)計 UDP/IP FPGA NiosⅡ　出處：《哈爾濱工程大學》2014年碩士論文　論文類型：學位論文

【摘要】：多波束成像聲納系統(tǒng)是可實現(xiàn)高效地探測海底的地形地貌并進行高精度實時成像的水下探測設(shè)備。為實現(xiàn)上述功能,系統(tǒng)需要將采集的大量數(shù)據(jù)進行實時傳輸,數(shù)據(jù)的遠距離高速傳輸成為了成像聲納系統(tǒng)的迫切需求,為滿足上述需求,本文深入研究了高速網(wǎng)絡(luò)接口的實現(xiàn)方案,并對其進行了軟件和硬件的設(shè)計與實現(xiàn)。本系統(tǒng)的設(shè)計核心是解決大數(shù)據(jù)量的遠距離高速傳輸問題,為滿足數(shù)據(jù)的高速傳輸要求,設(shè)計了基于FPGA的千兆以太網(wǎng)傳輸系統(tǒng),利用FPGA的高速并行處理能力保證系統(tǒng)中各模塊能夠高速獨立地運行,利用千兆以太網(wǎng)技術(shù)增加了數(shù)據(jù)傳輸帶寬與距離,解決數(shù)據(jù)的遠距離高速傳輸問題。根據(jù)系統(tǒng)的各項指標要求,同時兼顧開發(fā)難度,周期長短以及開發(fā)成本等因素,選擇合理的外圍芯片與實現(xiàn)方案,并利用Altium Designer完成方案的原理圖設(shè)計,根據(jù)信號完整性最好,電磁兼容性最好等準則進行布局布線,完成PCB的設(shè)計工作。利用硬件描述語言完成UDP/IP協(xié)議棧與其他模塊的邏輯設(shè)計工作。利用SOPC工具完成硬件平臺構(gòu)建工作,采用Nios Ⅱ軟核作為SOPC系統(tǒng)的核心,利用Nios Ⅱ Eclipse軟件完成處理器程序代碼的設(shè)計工作,利用Modelsim軟件對各邏輯功能模塊進行時序仿真與功能驗證。最后,完成千兆以太網(wǎng)系統(tǒng)整體設(shè)計后,為驗證系統(tǒng)性能是否滿足穩(wěn)定性與傳輸速率的要求,在實驗室環(huán)境下多次對其進行了長時間的驗證與測試工作,系統(tǒng)的發(fā)送速度可以穩(wěn)定運行在410Mbps,并沒有出現(xiàn)丟包,錯包等情況,滿足設(shè)計要求,達到了預期設(shè)計目標�？偨Y(jié)了本文的全部工作,并分析了測試結(jié)果。為以太網(wǎng)傳輸速度的提高提出了改進辦法,為后續(xù)的實際應(yīng)用奠定了堅實的基礎(chǔ)。
[Abstract]:Multi-beam imaging sonar system is an underwater detection equipment which can efficiently detect the topography and topography of the seabed and carry out high-precision real-time imaging. In order to realize the above functions, the system needs to transmit a large number of collected data in real time. The long-distance high-speed transmission of data has become the urgent need of imaging sonar system. In order to meet the above requirements, this paper deeply studied the implementation of high-speed network interface. The design core of this system is to solve the problem of long-distance high-speed transmission of large amount of data and to meet the requirements of high-speed data transmission. A gigabit Ethernet transmission system based on FPGA is designed. The high speed parallel processing ability of FPGA is used to ensure that each module of the system can run independently at high speed. Gigabit Ethernet technology is used to increase the bandwidth and distance of data transmission, to solve the problem of long-distance and high-speed data transmission. According to the requirements of the system indicators, at the same time taking into account the development difficulty. Choosing reasonable peripheral chip and implementation scheme, and using Altium Designer to complete the schematic design of the scheme, according to the signal integrity is the best. EMC is the best criterion for layout and cabling. Finish the design of PCB. Use hardware description language to complete the logic design of UDP/IP protocol stack and other modules. Use SOPC tools to complete the construction of hardware platform. Nios 鈪，

本文編號：1483191