發(fā)布時(shí)間：2018-03-17 11:46

  本文選題：紗線疵點(diǎn)　切入點(diǎn)：光電檢測(cè)　出處：《西安工業(yè)大學(xué)》2017年碩士論文　論文類型：學(xué)位論文

【摘要】：在紡織行業(yè)中,紡織品在工業(yè)流水線生產(chǎn)過(guò)程中會(huì)因原材料、紡織器械、環(huán)境條件等多種因素使紗線表面產(chǎn)生疵點(diǎn),紗線疵點(diǎn)主要表現(xiàn)為紗線直徑的突變與紗線表面上存在的臟點(diǎn),這類出現(xiàn)在紗線上的疵點(diǎn)直接影響紗線品質(zhì)。為了更有效管理紗線生產(chǎn)質(zhì)量,本文采用光電法以解決紗線檢測(cè)中的關(guān)鍵問(wèn)題,設(shè)計(jì)了一種新型紗線疵點(diǎn)檢測(cè)裝置。首先為提高傳感器輸出信號(hào)幅值,通過(guò)改變光照角度及鏡頭與傳感器焦合位置兩項(xiàng)因素,得到傳感器響應(yīng)信噪比最大時(shí)的信號(hào)采集方案,并對(duì)鏡頭與傳感器進(jìn)行了合焦結(jié)構(gòu)設(shè)計(jì);其次為滿足FPGA芯片對(duì)輸入信號(hào)的幅值要求,設(shè)計(jì)了信號(hào)處理電路,對(duì)初始信號(hào)進(jìn)行放大、濾波以提高信號(hào)幅值并提升信噪比;通過(guò)分析疵點(diǎn)尺寸與其對(duì)應(yīng)信號(hào)特征,獲得疵點(diǎn)特征函數(shù),取得疵點(diǎn)尺寸與處理后信號(hào)的對(duì)應(yīng)關(guān)系;為實(shí)現(xiàn)硬件識(shí)別疵點(diǎn)特征信息,利用FPGA芯片設(shè)計(jì)計(jì)時(shí)邏輯電路與比較邏輯電路,分別對(duì)信號(hào)進(jìn)行脈寬及峰值識(shí)別;最后利用NiossⅡI軟件開(kāi)發(fā)平臺(tái),借助構(gòu)建的特征函數(shù)實(shí)現(xiàn)脈寬及峰值的標(biāo)定及特征值存儲(chǔ)及顯示并進(jìn)行模擬信號(hào)測(cè)試。實(shí)測(cè)結(jié)果表明,論文設(shè)計(jì)的光電式紗線疵點(diǎn)檢測(cè)系統(tǒng)能很好的提取出運(yùn)動(dòng)過(guò)程中紗線表面特征信號(hào)的變化,在實(shí)驗(yàn)室環(huán)境下將系統(tǒng)外界噪聲進(jìn)行有效的抑制。當(dāng)紗線以30m/min運(yùn)動(dòng),檢測(cè)系統(tǒng)能有效檢測(cè)出大于50μm的紗線疵點(diǎn)。
[Abstract]:In the textile industry, textiles in the production process of industrial pipeline will cause yarn surface defects due to many factors, such as raw materials, textile instruments, environmental conditions, etc. Yarn defects are mainly manifested in the sudden change of yarn diameter and the existence of dirty spots on the yarn surface. These defects directly affect the yarn quality. In this paper, a new type of yarn defect detection device is designed by using photoelectric method to solve the key problems in yarn detection. Firstly, in order to improve the output signal amplitude of the sensor, two factors, namely, changing the illumination angle and coking position between the lens and the sensor, are adopted. The signal acquisition scheme of the sensor response to the maximum SNR is obtained, and the focusing structure of the lens and the sensor is designed. Secondly, the signal processing circuit is designed to meet the requirement of the input signal of the FPGA chip. The initial signal is amplified and filtered to improve the signal amplitude and signal to noise ratio. By analyzing the defect size and its corresponding signal characteristics, the defect characteristic function is obtained, and the corresponding relationship between the defect size and the processed signal is obtained. In order to realize the defect characteristic information of hardware, the timing logic circuit and the comparison logic circuit are designed by using FPGA chip to identify the pulse width and peak value of the signal respectively. Finally, the software development platform of Nioss 鈪，

本文編號(hào)：1624598